SUMMARY: hyperSPARC Upgrade

Andrew Mellanby (mel@maths.abdn.ac.uk)
Tue, 10 Jun 1997 09:45:39 +0100

Thanks to all who replied. All Correct.
There was a problem with the boot PROM(s)

(1) They sent the wrong one
(2) I plugged the replacement in the wrong way round and damaged it
(which produced similar bizarre errors)

>I am trying top install a hyperSPARC MBus module in my SPARCstattion 20,
>using a dumb-terminal as a console.
>
>This is what I get on the console:
>
>> SMC SPARCstation 10/20 UP/MP POST Version VRV3.43 (01/09/95)
>>
>> CPU_#0 hyperSPARC ROSS RT620/RT625 256K External Cache
>> CPU_#1 hyperSPARC ROSS RT620/RT625 256K External Cache
>>
>> CPU_#2 ***** Not Installed ****
>> CPU_#3 ***** Not Installed ****
>>
>> ...After a couple of minutes....
>>
>> Level 15 Interrupt Data Access Excpetion Data Access Exception Data Access
>> Exception

----
Andrew Mellanby
Computing Officer, Dept. Math.Sciences, University of Aberdeen
http://www.maths.abdn.ac.uk/~mel
(All views expressed are my own, NOT those of the University)