Publications in (Parallel) Computer Architecture
Articles in Refereed Journals:
- M. Hermenegildo, E. Tick.
Memory Referencing Characteristics and Caching
Performance of AND-Parallel Prolog on
Shared-Memory Architectures.
New Generation Computing,
Vol. 7,
Num. 1,
pages 37-58,
Springer Verlag,
October
1989.
Articles in Refereed Conferences:
- C. Carreras, C. López-Barrio, M. Hermenegildo.
Analytic Model of a Cache-only Memory
Architecture.
Parallel Architectures and Languages Europe -
PARLE'94,
LNCS,
Num. 817,
pages 336-351,
Springer-Verlag,
July
1994.
- M. Hermenegildo, E. Tick.
Memory Performance of AND-Parallel Prolog on
Shared-Memory Architectures.
Proceedings of the 17th International Conference on
Parallel Processing,
pages 17-22,
IEEE,
August
1988.
Books and Monographs:
- M. Hermenegildo.
An Abstract Machine Based Execution Model for Computer
Architecture Design and Efficient Implementation of
Logic Programs in Parallel.
Ph.D. Thesis, Dept. of Electrical and Computer Engineering (Dept. of
Computer Science TR-86-20), University of Texas at
Austin,
Austin, Texas 78712,
244 pages,
UMI, Boston, MA and U. of Texas,
August
1986.
- M. Hermenegildo.
Computational Models for Sequential and Parallel Execution
of Logic Programs on a Reconfigurable Architecture.
Ms. Thesis, The University of Texas at Austin,
ENS Bldg. 515, Austin, TX 78712,
122 pages,
June
1984.
Articles in Books and Other Collections:
- M. Hermenegildo.
Research on Parallel Logic Language
Implementation and Architecture at ICOT.
The ICOT Research Exchange Report, Vol. 2,
pages 157-174,
Institute for New Generation Computer Technology
(ICOT),
June
1992.
Technical Reports and Manuals:
- C. Carreras, M. Hermenegildo.
Towards an Analytical Model of the Data Diffusion
Machine.
UPM (PEPMA ESPRIT Project technical report),
1990.
- M. Hermenegildo, E. Tick.
Memory Performance of AND-Parallel Prolog on
Shared-Memory Architectures.
Num. ACA-ST-036-88,
Microelectronics and Computer Technology Corporation
(MCC), Austin, TX 78759,
January
1988.
- M. Hermenegildo, E. Tick.
Performance Evaluation of the RAP-WAM Restricted
AND-Parallel Architecture on Shared Memory
Multiprocessors.
Num. PP-085-87,
Microelectronics and Computer Technology Corporation
(MCC), Austin, TX 78759,
March
1987.
- M. Hermenegildo, P. McGehearty.
Address Escaping and Reference Classification in
the Design of a Cached, Multiple Cluster,
Shared-Memory Architecture.
Num. PP-SRS-TM-12,
MCC, Parallel Processing Program,
1987.
- Sanjay Deshpande, Matt Sejnowski, Manuel Hermenegildo, Julio de Melo, Roy Jenevein, Ashok Adiga, Allan Clarke.
TRAC (Texas Reconfigurable Array Computer) - Users' Manual.
1985.
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