:- module(_,_,[sr/bfall]).

% The circuit topology example revisited (using data structures):

named_resistor(r1,power,n1).
named_resistor(r2,power,n2). 

named_transistor(t1,n2,ground,n1).
named_transistor(t2,n3,n4,n2).
named_transistor(t3,n5,ground,n4).

named_inverter(inv(T,R),Input,Output) :-
    named_transistor(T,Input,ground,Output),
    named_resistor(R,power,Output). 

named_nand_gate(nand(T1,T2,R),Input1,Input2,Output) :-
    named_transistor(T1,Input1,X,Output),
    named_transistor(T2,Input2,ground,X),
    named_resistor(R,power,Output). 

named_and_gate(and(N,I),Input1,Input2,Output) :-
    named_nand_gate(N,Input1,Input2,X),
    named_inverter(I,X,Output).

% Some queries:
% ?- named_inverter(Inv,I,O).
% ?- named_and_gate(G,In1,In2,Out).
% ?- named_resistor(R1,P1,P2).
% ?- named_transistor(T1,P1,P2,P3).