Parallelism is going mainstream. Many chip manufactures are turning to multicore processor designs rather than scalar-oriented frequency increases as a way to get performance in their desktop, enterprise, and mobile processors. This endeavor is not likely to succeed long term if mainstream applications cannot be parallelized to take advantage of tens and eventually hundreds of hardware threads. Multicore architectures will differ in significant ways from their multisocket predecessors. For example, the communication to compute bandwidth ratio is likely to be higher, which will positively impact performance. More generally, multicore architectures introduce several new dimensions of variability in both performance guarantees and architectural contracts, such as the memory model, that may not stabilize for several generations of product.

Programs written in functional or (constraint-)logic programming languages, or even in other languages with a controlled use of side effects, can greatly simplify parallel programming. Such declarative programming allows for a deterministic semantics even when the underlying implementation might be highly non-deterministic. In addition to simplifying programming this can simplify debugging and analyzing correctness.

DAMP is the third (see DAMP07 and DAMP06) in a series of one-day workshops seeking to explore ideas in programming language design that will greatly simplify programming for multicore architectures, and more generally for tightly coupled parallel architectures. The emphasis will be on functional and (constraint-)logic programming, but any programming language ideas that aim to raise the level of abstraction are welcome. DAMP seeks to gather together researchers in declarative approaches to parallel programming and to foster cross fertilization across different approaches.

Specific topics include, but are not limited to:

• suitability of functional and (constraint-)logic programming languages to multicore applications;
• run-time issues such as garbage collection or thread scheduling;
• architectural features that may enhance the parallel performance of declarative languages;
• type systems and analysis for accurately knowing or limiting dependencies, aliasing, effects, and nonpure features;
• ways of specifying or hinting at parallelism;
• ways of specifying or hinting at data placement which abstract away from any details of the machine;
• compiler techniques, automatic parallelization, automatic granularity control;
• experiences of and challenges arising from making declarative programming practical;
• technology for debugging parallel programs;
• design and implementation of domain-specific declarative languages for multi-core;

Papers must be submitted using the EasyChair DAMP 2008 site: http://www.easychair.org/conferences/?conf=DAMP2008

All papers must be written in English and must be no longer than 15 pages. Authors are strongly encouraged to use the LNCS paper formatting guidelines for their submission.

Koen De Bosschere (U. of Gent, Belgium)
Manuel Carro (Tech. U. of Madrid, Spain)
Manuel Chakravarty (U. of New S. Wales, Australia)
Clemens Grelck (U. of Luebeck, Germany)
Dan Grossman (U. of Washington, USA)
Manuel Hermenegildo (T.U. Madrid, Spain; U. New Mexico, USA)
Suresh Jagannathan (Purdue U., USA)
Pedro Lopez-Garcia (Tech. U. of Madrid, Spain)
Lee Naish (Melbourne University, Australia)
Leaf Petersen (Intel Corporation, USA)
Enrico Pontelli (New Mexico State U., USA)
John Reppy (U. of Chicago, USA)
Vitor Santos-Costa (U. of Porto, Portugal).

For additional information about papers and submissions, please contact the Program Chair:

Manuel Hermenegildo
Technical University of Madrid and IMDEA-Software, Spain
University of New Mexico, U.S.A.
damp2008@easychair.org

For additional information about the conference please contact the General Chairs:

Leaf Petersen
Intel Corporation, Santa Clara, CA, U.S.A

Neal Glew
Intel Corporation, Santa Clara, CA, U.S.A,

You can also view or download the Call for Papers as plain text or pdf.

• 8:30 - 9:00 Breakfast
• 9:00 - 10:00 Invited Talk
  • Intel 64 Architecture Memory Ordering, Bratin Saha (Intel Corporation)
• 10:30 - 12:00 Session I
  • Partial Vectorisation of Haskell Programs. Manuel Chakravarty, Roman Leshchinskiy, Simon Peyton Jones and Gabriele Keller.
  • Efficient Heap Management for Declarative Data Parallel Programming on Multicores. Clemens Grelck and Sven-Bodo Scholz.
  • Implementing Joins using Extensible Pattern Matching. Philipp Haller and Tom Van Cutsem.
• 12:00 - 1:30 Lunch
• 1:30 - 3:30 Session II
  • Executing Action Languages for Planning Problems on Multi-core Platforms: Some Preliminary Results. Tran Cao Son, Son To, Tu Phan and Enrico Pontelli.
  • Memoizing Multi-Threaded Transactions. Lukasz Ziarek and Suresh Jagannathan.
  • On Supporting Parallelism in a Logic Programming System. Vitor Santos Costa.
  • Toward a parallel implementation of Concurrent ML. John Reppy and Yinqi Xiao.
• 3:30 - 4:00 Coffee
• 4:00 - 5:00 Invited Talk
  • GPU Computing with CUDA. Ian Buck (NVIDIA).